1. Technical Field
The present disclosure relates to data processing systems with one or more processing units interconnected in a network, and particularly SoC (System on Chip) systems integrated into a chip or semiconductor chip and NoC (Network on Chip) systems comprising an integrated network interconnecting processing units and peripheral units. The present disclosure relates more particularly to routing interrupts in such a system.
In some embodiments, the present disclosure can particularly be applied to set-top boxes comprising a chip integrating several processing units.
2. Description of the Related Art
FIG. 1 schematically represents an integrated data processing system to which embodiments of the present disclosure can be applied. In FIG. 1, the system PS1 comprises a physical central processing unit CPU, several peripheral units PRP1, PRP2, PRP3, and an interconnected network NW linking the central processing unit to the peripheral units. The system also comprises an interrupt control unit ICU connected to the unit CPU and to the units PRP1-PRP3, to manage and route to the unit CPU the interrupt signals from the units PRP1-PRP3. The peripheral units PRP1-PRP3 may for example comprise memories, interface units for interfacing with external memories, and input/output ports.
The unit ICU particularly comprises an interrupt signal register S storing the active/inactive state of the interrupts, and an interrupt mask register M storing a masked/unmasked state of each of the interrupts stored in the register S.
The unit CPU can time-share execute several independent applications or operating systems CP1, CP2, CP3, CP4 referred to below as “machine,” “virtual unit” or “virtual processing unit”. Generally, a virtual unit means a software component capable of working in a native and autonomous manner on one or more processors. For this purpose, the unit CPU executes a trust agent TA which acts as a hypervisor to enable the execution of several virtual units, for example in a virtualization context. The agent TA thus manages the activation and the deactivation of the virtual units, for example depending on their priority levels and access rights to the resources of the system. The agent TA also routes each interrupt reported by the unit ICU to the virtual unit CP1-CP4 specified as receiving the interrupt.
Every time there is an interrupt, the unit ICU activates the agent TA executed by the unit CPU, which greatly consumes the processing resources of the unit CPU. If the interrupt were masked by the virtual unit CP1-CP4 receiving the interrupt, the agent TA will have been activated unnecessarily. The same is true if the virtual unit receiving the interrupt were inactive at the time the interrupt arrived, another virtual unit having higher priority being executed. If the virtual unit receiving the interrupt is activated to the detriment of another virtual unit being executed, the virtual unit activated can have a less high priority than the virtual unit being executed.
Furthermore, activating a virtual unit CP1-CP4 generally involves storing an execution context of another virtual unit CP1-CP4 being executed and to be deactivated, and loading the context of the virtual unit to be activated, operations which can consume a lot of execution time.
FIG. 2 represents a processing system PS2 comprising several physical processing units CPU1, CPU2 connected to each other and to the peripheral units PRP1, PRP2, PRP3 through the network NW. Each processing unit CPU1, CPU2 is connected to a respective interrupt control unit ICU1, ICU2 which can be identical to the unit ICU represented in FIG. 1. Each processing unit CPU1, CPU2 executes a trust agent or hypervisor that is specific to each processing unit for security reasons and/or because some processing units are specialized in performing specific processes more efficiently, and/or because some specialized processing units are not able to implement several virtual units.
The unit ICU1 receives the interrupts from the peripheral units PRP1 and PRP2, and the unit ICU2 receives the interrupts from the peripheral unit PRP3. Therefore, the routing of the interrupts from the units PRP1-PRP3 is determined by the connections between firstly the units ICU1 and ICU2, and secondly the peripheral units. The architecture thus shown in FIG. 2 has the disadvantage of lacking flexibility as regards the routing of the interrupts from the peripheral units PRP1-PRP3 to one or other of the processing units CPU1, CPU2. If one of the agents TA of the units CPU1, CPU2 is configured to be the main agent of the system, it is necessary to implement communications between the main agent and the other agents TA. Therefore, this solution is highly consuming in terms of software and performance.
This lack of flexibility can be remedied by the system architecture shown in FIG. 3. Thus, FIG. 3 represents a processing system PS3 also comprising processing units CPU1, CPU2 each associated with an interrupt control unit ICU1, ICU2, and peripheral units PRP1-PRP3. To enable each interrupt coming from one or other of the units PRP1-PRP3 to be routed to one or other of the units CPU1, CPU2, the system PS3 further comprises a network dedicated to the transmission of the interrupts comprising a shared and configurable interrupt control unit SICU interconnected between, firstly, the two units ICU1 and ICU2, and secondly, the units PRP1-PRP3. Therefore, by configuration of the unit SICU, an interrupt coming from any unit PRP1-PRP3 can be routed to one or other of the units CPU1 and CPU2. However, the architecture shown in FIG. 3 requires additional circuits particularly to produce the unit SICU, and additional communications to enable the unit SICU to be configured. This architecture also poses a security problem if all the agents TA of the units CPU1, CPU2 can configure the unit SICU, or requires the implementation of a main agent and of the additional communications between the agents allocated to the units CPU1, CPU2 and the main agent.